1. Field
The present invention relates to a method and structure for forming contact pads or circuits on a printed circuit board using a zero undercut technology. In particular, the present invention relates to a method and a structure for forming contact pads on a printed circuit board over a plated and filled via in which additional metallic or non-metallic coating is applied to the side walls and top surfaces of said pads' metal layers that were plated onto the filled via to the extents of the pad geometry resulting in a zero undercut of the plated features over the filled via. In an alternative embodiment of the present invention employing an unfilled via the metallic or non metallic coating is applied to the outer surfaces of the plated metal layers which extend around and down into the unfilled via.
2. The Related Art
The traditional printed circuit board filled via, or via in pad technology surface contact pads as well as unfilled vias and all outer layer circuit features suffer from poor edge definitions due to the undercut that is traditionally associated with these features. Such features, typically in the case of contact pads, are formed on a printed circuit board by subtractive etching using a hard gold plated layer over a Ni plated layer acting as an etch resist defining the pad geometry of the underlying base metal, typically copper. Many other metals can be utilized as the wear resistant etch resist including but not limited to Palladium, and rhodium. In the case of via-in-pad technology, traditionally a blind or through via or hole is formed in a printed circuit board (FIG. 1) that is subsequently plated with an electro-less plating process to form a thin layer of metallization such as, copper, conductive polymer or other conductive material such as graphite, in the via. In the case of electroless copper, the copper is also deposited on the base copper layers of the board's external surface. This prepares the vias for subsequent electro-plating operations. Next, a conductive metal, typically copper, is electro plated in the vias and subsequently on the surface of the panel that contains the board (FIG. 2). Boards are typically built into a larger process panel and then removed from this panel in a later routing step. This plating step is called a “panel plate” step, due to the fact that the entire surface of the panel is plated. Once a sufficient amount of copper is plated in the vias, then subsequently on the surface, a filling step occurs in which a fill material, typically an epoxy, is filled in the vias and removed from the surface and planarized to the surface in a sanding step FIG. 3.
At this point, an electro-less plating step of metal or conductive polymer is formed on the surface of the panel to prepare the surface of the panel for the subsequent electro-plating step. This step is primarily used to initiate the surface of the epoxy fill in order to electro plate in subsequent steps. This step may be unnecessary if a conductive fill material is used such as but not limited to CB100 from DuPont Corporation. Next, a plating mask, typically a photosensitive mask, is applied to the surfaces of the board and removed from just the areas that will define the final shape of the contact pads and, in many cases, all the remaining circuitry. The panel is then electro-plated on the exposed pattern and filled epoxy surface. This mask and plate step is typically referred to as the pattern-plating step. After plating metal on the exposed pattern, typically copper, a final plating finish, typically nickel and gold, is plated on the exposed surface (FIG. 4.) The photosensitive mask is removed at this stage.
Viewing the contact pads from a cross sectional view (FIG. 4), the base copper can be seen extending across the entire surface of the board, with a thin electro-less metallization across the base copper and into the vias. Panel plating extends across the base copper and into the vias, epoxy fill is seen inside the vias and an additional electroless metallization is seen across the panel plate and the epoxy fill. In the case of some electro-less conductive polymers this layer would only be visible on the planerized epoxy surface. A layer of metallization (Pattern Plate) can be seen on top of the planerized epoxy and across the extents of the circuit pattern. This circuit pattern metal would extend beyond the base metal layers typically by 2-3 mils, culminating with layers of nickel-gold as the permanent etch resist. It is important to note that the sidewalls of the pattern-plated metal are exposed and are subject to the negative effects of the subsequent etching process. This etching process is typically a chemical etch that dissolves away the base metal and the exposed sidewall metal of the pattern plated circuitry. The nickel and gold layers, being impervious to this etching process, remain and protect most of the metallization under it. However, the chemical etchant not only etches metal layers in the z-axis but also in the x and y axis, approximately equally. Therefore, the pad and circuitry dimensions, including the contact pads under the nickel-gold layers, is severely under-minded or under-cut from all directions (as seen in FIG. 7). This under-cutting reduces the underlying target pad for contact by a spring-loaded pin as used in the test market. It also creates a shorting risk if the spring pin contacts the nickel/gold overhang and breaks it off with the nickel gold sliver potentially falling between nets on the board's contact area. Further, this undermining affects the shape of the underlying circuitry creating unwanted electrical effects on high-speed transmission lines. It would therefore be desirable to provide a method and a structure that avoids these aforementioned shortcomings.